RWByteAddressBuffer.InterlockedAddF16Emulated

Description

Perform a 16-bit floating point atomic add operation at byteAddress through emulation using half2 atomics.

Signature

void RWByteAddressBuffer.InterlockedAddF16Emulated(
    uint byteAddress,
    half value,
    out half originalValue);

Parameters

byteAddress : uint

The address at which to perform the atomic add operation.

value : half

The value to add to the value at byteAddress.

originalValue : half

The original value at byteAddress before the add operation.

Remarks

For SPIR-V, this function maps to OpAtomicFAdd on a half2 vector with the correct part set to value and the remaining part set to 0. This requires the AtomicFloat16VectorNV capability introduced by the SPV_NV_shader_atomic_fp16_vector extension.

For HLSL, this function translates to an equivalent NVAPI call due to lack of native HLSL intrinsic for floating point atomic add. For CUDA, this function maps to atomicAdd.

Availability and Requirements

Defined for the following targets:

hlsl

Available in all stages.

cuda

Available in all stages.

spirv

Available in all stages.

Requires capabilities: SPV_KHR_non_semantic_info, SPV_GOOGLE_user_type, spvDerivativeControl, spvImageQuery, spvImageGatherExtended, spvSparseResidency, spvMinLod, spvFragmentFullyCoveredEXT.